Module object::elf[][src]

Expand description

ELF definitions.

These definitions are independent of read/write support, although we do implement some traits useful for those.

This module is the equivalent of /usr/include/elf.h, and is based heavily on it.

Structs

Section compression header.

Section compression header.

Dynamic section entry.

Dynamic section entry.

The header at the start of every 32-bit ELF file.

The header at the start of every 64-bit ELF file.

Magic number and other information.

Note section entry header.

Note section entry header.

Program segment header.

Program segment header.

Relocation table entry without explicit addend.

Relocation table entry without explicit addend.

Relocation table entry with explicit addend.

Relocation table entry with explicit addend.

Section header.

Section header.

Symbol table entry.

Symbol table entry.

Additional information about a Sym32.

Additional information about a Sym64.

Constants

Configuration alternative created.

Direct binding enabled.

Disp reloc applied at build time.

Disp reloc applied at run-time.

Object is modified after built.

Filtee terminates filters search.

Set RTLD_GLOBAL for this object.

Global auditing required.

Set RTLD_GROUP for this object.

Set RTLD_INITFIRST for this object.

Object is used to interpose.

Trigger filtee loading at runtime.

Ignore default lib search path.

Set RTLD_NODELETE for this object.

Object has no-direct binding.

Object can’t be dldump’ed.

Set RTLD_NOOPEN for this object.

Set RTLD_NOW for this object.

$ORIGIN must be handled.

Singleton symbols are used.

Object has individual interposers.

No lazy binding for this object

Object may use DF_ORIGIN

Module uses the static TLS model

Symbol resolutions starts here

Object contains text relocations

Object auditing.

Shared object to load before self

Process relocations of object

Configuration information.

For debugging; unspecified

Dependency auditing.

Start of encoded range

Feature selection (DTF_*).

Shared object to get values from

Address of termination function

Array with addresses of fini fct

Size in bytes of DT_FINI_ARRAY

Flags for the object being loaded

State flags, see DF_1_* below.

Start of conflict section

Size of conflict section

GNU-style hash table.

Library list

Size of library list

Prelinking timestamp

Address of symbol hash table

End of OS-specific

End of processor-specific

Address of init function

Array with addresses of init fct

Size in bytes of DT_INIT_ARRAY

Address of PLT relocs

Start of OS-specific

Start of processor-specific

Address of aux .dynamic.

(O32)Size of compact rel section.

Address of CONFLICT section

Number of CONFLICT entries

Flags indicating for C++ flavor.

Delta C++ class definition.

Delta symbols that hold the class declaration.

Number of entries in DT_MIPS_DELTA_CLASSSYM.

Number of entries in DT_MIPS_DELTA_CLASS.

Delta C++ class instances.

Number of entries in DT_MIPS_DELTA_INSTANCE.

Delta relocations.

Number of entries in DT_MIPS_DELTA_RELOC.

Delta symbols that Delta relocations refer to.

Number of entries in DT_MIPS_DELTA_SYM.

First GOT entry in DYNSYM

GP value for aux GOTs.

Number of GOT page table entries

Address of .interface.

Size of the .interface section.

Version string (string tbl index)

Address of LIBLIST section

Number of LIBLIST entries

Number of local GOT entries

Address of .options.

Default suffix of dso to be added by rld on dlopen() calls.

The address of .got.plt in an executable using the new non-PIC ABI.

Address of run time loader map.

An alternative description of the classic MIPS RLD_MAP that is usable in a PIE as it stores a relative offset from the address of the tag rather than an absolute address.

Address of rld_text_rsolve function stored in GOT.

Runtime linker interface version

The base of the PLT in an executable using the new non-PIC ABI if that PLT is writable. For a non-writable PLT, this is omitted or has a zero value.

Number of DYNSYM entries

First external DYNSYM

Move table.

Name of needed library

Address of _gp.

Marks end of dynamic section

Processor defined value

PLT padding.

Type of reloc in PLT

Size in bytes of PLT relocs

Flags for DT_* entries, affecting the following DT_* entry.

Array with addresses of preinit fct

size in bytes of DT_PREINIT_ARRAY

Address of Rel relocs

Address of Rela relocs

Size of one Rela reloc

Total size of Rela relocs

Size of one Rel reloc

Total size of Rel relocs

Library search path (deprecated)

Library search path

Name of shared object

Size of string table

Address of string table

Start symbol search here

Size of one symbol table entry

Entry size of syminfo

Syminfo table.

Size of syminfo table (in bytes)

Address of symbol table

Address of SYMTAB_SHNDX section

Reloc might modify .text

Address of version definition table

Number of version definitions

Address of table with needed versions

Number of needed versions

PA-RISC 1.0 big-endian.

PA-RISC 1.1 big-endian.

PA-RISC 2.0 big-endian.

All addresses must be < 2GB.

Relocations for relaxing exist.

NB conflicts with EF_ARM_VFP_FLOAT

NB conflicts with EF_ARM_SOFT_FLOAT

8-bit structure alignment is in use

64-bit ABI

arch. version mask

os-specific flags

MIPS architecture level.

-mips1 code.

-mips2 code.

-mips3 code.

-mips4 code.

-mips5 code.

MIPS32 code.

MIPS32r2 code.

MIPS64 code.

MIPS64r2 code.

Uses PIC calling sequence.

Uses FP64 (12 callee-saved).

Uses IEEE 754-2008 NaN encoding.

A .noreorder directive was used.

Contains PIC code.

Architecture version.

Program uses arch. extensions.

Allow lazy swapping.

Program expects little endian.

No kernel assisted branch prediction.

Trap nil pointer dereference.

Program expects wide mode.

PowerPC64 bits specifying ABI.

PowerPC embedded flag

PowerPC -mrelocatable flag

PowerPC -mrelocatable-lib flag

High GPRs kernel facility needed.

generic V8+ features

HAL R1 extensions

little endian data

Sun UltraSPARC1 extensions

Sun UltraSPARCIII extensions

32-bit object.

64-bit object.

Invalid class.

End of OS-specific compression types.

End of processor-specific compression types.

Start of OS-specific compression types.

Start of processor-specific compression types.

ZLIB/DEFLATE algorithm.

2’s complement, little endian.

2’s complement, big endian.

Invalid data encoding.

File identification bytes stored in Ident::magic.

IBM AIX.

Object uses GNU ELF extensions.

SGI Irix.

Object uses GNU ELF extensions.

Novell Modesto.

UNIX System V ABI.

Sun Solaris.

Standalone (embedded) application.

UNIX System V ABI.

Compaq TRU64 UNIX.

OS descriptor for NT_GNU_ABI_TAG.

OS descriptor for NT_GNU_ABI_TAG.

OS descriptor for NT_GNU_ABI_TAG.

OS descriptor for NT_GNU_ABI_TAG.

Motorola MC68HC05 microcontroller

Motorola MC68HC08 microcontroller

Motorola MC68HC11 microcontroller

Motorola M68HC12

Motorola MC68HC16 microcontroller

Motorola m68k family

Renesas 78KOR

Motorola m88k family

Intel 80386

Intel 80860

Intel 80960

Intel 8051 and variants

Freescale 56800EX DSC

ARM AARCH64

Digital Alpha

Altera Nios II

AMD GPU

Argonaut RISC Core

Arca RISC

ARC International ARCompact

Synopsys ARCompact V2

ARM

Atmel AVR 8-bit microcontroller

Amtel 32-bit microprocessor

Beyond BA1

Beyond BA2

Analog Devices Blackfin DSP

Linux BPF – in-kernel virtual machine

Infineon C16x/XC16x

Paneve CDP

Freescale Communication Engine RISC

CloudShield

Cognitive Smart Memory Processor

Motorola Coldfire

Bluechip CoolEngine

KIPO-KAIST Core-A 1st gen.

KIPO-KAIST Core-A 2nd gen.

National Semi. CompactRISC

National Semi. CompactRISC CR16

Cray NV2 vector architecture

Axis Communications 32-bit emb.proc

National Semi. CompactRISC CRX

C-SKY

CSR Kalimba

NVIDIA CUDA

Cypress M8C

Mitsubishi D10V

Mitsubishi D30V

New Japan Radio (NJR) 24-bit DSP

Microchip Technology dsPIC30F

Icera Semi. Deep Execution Processor

Cyan Technology eCOG1X

Cyan Technology eCOG2

Cyan Technology eCOG16

KM211 KMX8

KM211 KMX16

Freescale Extended Time Processing Unit

eXcess configurable cpu

Fujitsu F2MC16

Digital Alpha

Element 14 64-bit DSP Processor

Fujitsu FR20

Fujitsu FR30

FTDI Chip FT32

Siemens FX66 microcontroller

Hitachi H8S

Hitachi H8/300

Hitachi H8/300H

Hitachi H8/500

QUALCOMM Hexagon

Harvard University machine-independent object files

Intel MCU

Intel Merced

Ubicom IP2xxx

Infineon Technologies 32-bit emb.proc

Intel K10M

KM211 KM32

KM211 KMX32

KM211 KVARC

Intel L10M

RISC for Lattice FPGA

Renesas M16C

AT&T WE 32100

Renesas M32C

Mitsubishi M32R

M2000 Reconfigurable RISC

MAX processor

Dallas Semi. MAXQ30 mc

Microchip 8-bit PIC(r)

MCST Elbrus

Toyota ME16 processor

Imagination Tech. META

Xilinx MicroBlaze

MIPS R3000 big-endian

MIPS R3000 little-endian

Stanford MIPS-X

Fujitsu MMA Multimedia Accelerator

STMicroelectronics 64bit VLIW DSP

Donald Knuth’s educational 64-bit proc

Matsushita MN10200

Matsushita MN10300

Moxie processor

Texas Instruments msp430

Sony nCPU embeeded RISC

Denso NDR1 microprocessor

Andes Tech. compact code emb. RISC

No machine

Nanoradio Optimized RISC

National Semi. 32000

Open8 RISC

OpenRISC 32-bit embedded processor

Siemens PCP

Digital PDP-10

Digital PDP-11

Sony DSP Processor

picoJava

PowerPC

PowerPC 64-bit

SiTera Prism

Renesas R32C

Motorola RCE

TRW RH-32

RISC-V

Renesas RL78

Freescale RS08

Renesas RX

IBM System/370

IBM S390

Sunplus S+core7 RISC

Sharp embedded microprocessor

Seiko Epson C17

Seiko Epson S1C33 family

Hitachi SH

Analog Devices SHARC family

Infineon Tech. SLE9X

Trebia SNP 1000

SUN SPARC

Sun’s “v8plus”

SPARC v9 64-bit

IBM SPU/SPC

STmicroelectronics ST7 8 bit mc

STMicroelectronics ST9+ 8/16 mc

STMicroelectronics ST19 8 bit mc

STMicroelectronic ST100 processor

STMicroelectronics ST200

Motorola Start*Core processor

STMicroelectronics STM8

STMicroelectronics STxP7x

Silicon Graphics SVx

Tileta TILE64

Tilera TILE-Gx

Tilera TILEPro

Advanced Logic Corp. Tinyj emb.fam

Texas Instruments App. Specific RISC

Texas Instruments TMS320C2000 DSP

Texas Instruments TMS320C55x DSP

Texas Instruments TMS320C6000 DSP

Texas Instruments Prog. Realtime Unit

Thompson Multimedia General Purpose Proc

Tenor Network TPC

Siemens Tricore

NXP Semi. TriMedia

Altium TSK3000

PKU-Unity & MPRC Peking Uni. mc series

NEC V800 series

NEC v850

Digital VAX

Alphamosaic VideoCore

Broadcom VideoCore III

Broadcom VideoCore V

Controls and Data Services VISIUMcore

Fujitsu VPP500

AMD x86-64 architecture

XMOS xCORE

Motorola XGATE

New Japan Radio (NJR) 16-bit DSP

Tensilica Xtensa Architecture

Zilog Z80

LSI Logic 16-bit DSP Processor

Core file.

Shared object file.

Executable file.

OS-specific range end.

Processor-specific range end.

OS-specific range start.

Processor-specific range start.

No file type.

Relocatable file.

Current ELF version.

Invalid ELF version.

Mark group as COMDAT.

Require exact match

Ignore interface version

x86 io permission bitmap (1=deny).

i386 TLS slots (struct user_desc).

ARM hardware breakpoint registers.

ARM hardware watchpoint registers.

ARM Scalable Vector Extension registers.

ARM system call number.

ARM TLS register.

ARM VFP/NEON registers.

Contains copy of asrset struct.

Contains copy of auxv array.

Contains information about mapped files.

Contains copy of fpregset struct.

ABI information.

Build ID bits as generated by ld --build-id.

Version note generated by GNU gold containing a version string.

Synthetic hwcap information.

Program property.

Contains copy of gwindows struct.

Contains copy of lwpinfo struct.

Contains copy of lwpstatus struct.

MIPS DSP ASE registers.

MIPS floating-point mode.

String from sysinfo(SI_PLATFORM).

Data Stream Control Register.

Event Based Branch Registers.

Memory Protection Keys registers.

Performance Monitor Registers.

Program Priority Register.

PowerPC SPE/EVR registers.

Target Address Register.

TM checkpointed Data Stream Control Register.

TM checkpointed FPR Registers.

TM checkpointed GPR Registers.

TM checkpointed Program Priority Register.

TM checkpointed Target Address Register.

TM checkpointed VMX Registers.

TM checkpointed VSX Registers.

TM Special Purpose Registers.

PowerPC Altivec/VMX registers.

PowerPC VSX registers.

Contains copy of prcred struct.

Contains copy of fpregset struct.

Contains copy of fprxregset struct.

Contains copy of prpsinfo struct.

Contains copy of prstatus struct.

Contains copy of user_fxsr_struct.

Contains copy of prxregset struct.

Contains copy of psinfo struct.

Contains copy of pstatus struct.

s390 control registers.

s390 guarded storage broadcast control block.

s390 guarded storage registers.

s390 upper register halves.

s390 breaking event address.

s390 prefix register.

s390 runtime instrumentation.

s390 system call restart data.

s390 transaction diagnostic block.

s390 timer register.

s390 TOD clock comparator register.

s390 TOD programmable register.

s390 vector registers 16-31.

s390 vector registers 0-15 upper half.

Contains copy of siginfo_t, size might increase.

Desired pagesize for the binary.

Contains copy of task structure.

Contains copy of utsname struct.

Note type for version string.

Vmcore Device Dump Note.

x86 extended state using xsave.

Exception processing options.

record the fill value used by the linker.

HW workarounds. ‘AND’ bits when merging.

HW workarounds. ‘OR’ bits when merging.

Hardware workarounds performed

Undefined.

Section padding options.

Register usage information.

reserve space for desktop tools to write.

Dismiss invalid address faults?

Force floating point debug mode?

FPE’s which MAY be enabled.

FPE’s which MUST be enabled.

page zero must be mapped.

Force sequential memory mode?

R4000 end-of-page patch.

R5000 cvt.[ds].l bug. clean=1.

R5000 end-of-page patch.

may need R8000 prefetch patch.

Absolute segment.

Position-independent segment.

Segment contains the location addressed by the static base.

spec insns w/o recovery

OS-specific segment flags.

Processor-specific segment flags.

Segment is readable.

Segment is writable.

Segment is executable.

Special value for FileHeader*::e_phnum.

ARM unwind segment.

Dynamic linking information.

GCC .eh_frame_hdr segment.

Read-only after relocation.

Indicates stack executability.

End of OS-specific segment types.

End of processor-specific segment types.

arch extension bits

ia64 unwind bits

Program interpreter.

Loadable program segment.

Start of OS-specific segment types.

Start of processor-specific segment types.

FP mode requirement.

Register usage information.

Runtime procedure table.

Auxiliary information.

Program header table entry is unused.

Segment contains the program header table.

Reserved.

Thread-local storage segment.

No flags

Hash size not power of 2

Ignore LD_LIBRARY_PATH

Use quickstart

Direct 8 bit

Direct 16 bit

Direct 32 bit

Copy symbol at runtime

Create GOT entry

8 bit PC relative GOT entry

8 bit GOT offset

16 bit PC relative GOT entry

16 bit GOT offset

32 bit PC relative GOT entry

32 bit GOT offset

Create PLT entry

No reloc

PC relative 8 bit

PC relative 16 bit

PC relative 32 bit

8 bit PC relative PLT address

8 bit PLT offset

16 bit PC relative PLT address

16 bit PLT offset

32 bit PC relative PLT address

32 bit PLT offset

Adjust by program base

32 bit module number

32 bit module-relative offset

8 bit GOT offset for GD

16 bit GOT offset for GD

32 bit GOT offset for GD

8 bit GOT offset for IE

16 bit GOT offset for IE

32 bit GOT offset for IE

8 bit GOT offset for LDM

16 bit GOT offset for LDM

32 bit GOT offset for LDM

8 bit module-relative offset

16 bit module-relative offset

32 bit module-relative offset

8 bit offset relative to static TLS block

16 bit offset relative to static TLS block

32 bit offset relative to static TLS block

32 bit TP-relative offset

Direct 8 bit

Direct 16 bit

Direct 32 bit

Direct 32 bit PLT address

Copy symbol at runtime

Create GOT entry

32 bit GOT entry

Load from 32 bit GOT entry, relaxable.

32 bit offset to GOT

32 bit PC relative offset to GOT

Adjust indirectly by program base

Create PLT entry

No reloc

PC relative 8 bit

PC relative 16 bit

PC relative 32 bit

32 bit PLT address

Adjust by program base

32-bit symbol size

TLS descriptor containing pointer to code and to argument, returning the TLS offset for the symbol.

Marker of call through TLS descriptor for relaxation.

ID of module containing symbol

Offset in TLS block

Direct 32 bit for GNU version of general dynamic thread local data

Direct 32 bit for general dynamic thread local data

Relocation for call to __tls_get_addr()

Tag for popl in GD TLS code

Tag for pushl in GD TLS code

GOT offset for TLS descriptor.

GOT entry for static TLS block offset

Address of GOT entry for static TLS block offset

GOT entry for negated static TLS block offset

Direct 32 bit for GNU version of local dynamic thread local data in LE code

Direct 32 bit for local dynamic thread local data in LE code

Relocation for call to __tls_get_addr() in LDM code

Tag for popl in LDM TLS code

Tag for pushl in LDM TLS code

Offset relative to TLS block

Offset relative to static TLS block

Negated offset relative to static TLS block

Offset in static TLS block

Negated offset in static TLS block

Direct 8 bit.

Direct 12 bit.

Direct 16 bit.

Direct 20 bit.

Direct 32 bit.

Direct 64 bit.

Copy symbol at runtime.

Create GOT entry.

12 bit GOT offset.

16 bit GOT offset.

20 bit GOT offset.

32 bit GOT offset.

64 bit GOT offset.

32 bit PC rel. to GOT entry >> 1.

16 bit offset to GOT.

32 bit offset to GOT.

64 bit offset to GOT.

32 bit PC relative offset to GOT.

32 bit PC rel. GOT shifted by 1.

12 bit offset to jump slot.

16 bit offset to jump slot.

20 bit offset to jump slot.

32 bit offset to jump slot.

64 bit offset to jump slot.

32 bit rel. offset to jump slot.

STT_GNU_IFUNC relocation.

Create PLT entry.

No reloc.

PC relative 16 bit.

PC relative 16 bit shifted by 1.

PC relative 32 bit.

PC relative 32 bit shifted by 1.

PC relative 64 bit.

16 bit PC rel. PLT shifted by 1.

32 bit PC relative PLT address.

32 bit PC rel. PLT shifted by 1.

64 bit PC relative PLT address.

16 bit offset from GOT to PLT.

32 bit offset from GOT to PLT.

16 bit offset from GOT to PLT.

Adjust by program base.

ID of module containing symbol.

Offset in TLS block.

Direct 32 bit for general dynamic thread local data.

Direct 64 bit for general dynamic thread local data.

Tag for function call in general dynamic TLS code.

12 bit GOT offset for static TLS block offset.

20 bit GOT offset for static TLS block offset.

32 bit GOT offset for static TLS block offset.

64 bit GOT offset for static TLS block offset.

32 bit address of GOT entry for negated static TLS block offset.

64 bit address of GOT entry for negated static TLS block offset.

32 bit rel. offset to GOT entry for negated static TLS block offset.

Tag for function call in local dynamic TLS code.

Direct 32 bit for local dynamic thread local data in LE code.

Direct 64 bit for local dynamic thread local data in LE code.

32 bit offset relative to TLS block.

64 bit offset relative to TLS block.

32 bit negated offset relative to static TLS block.

64 bit negated offset relative to static TLS block.

Tag for load insn in TLS code.

Negated offset in static TLS block.

Direct 16-bit.

Direct 32 bit.

Direct 64 bit.

Dir. ADD imm. from bits 11:0.

P-page-rel. GOT off. ADRP 32:12.

PC-rel. ADR imm. from bits 20:0.

Page-rel. ADRP imm. from 32:12.

Likewise; no overflow check.

Likewise for CALL.

PC-rel. cond. br. imm. from 20:2.

Copy symbol at runtime.

Create GOT entry.

GOT-relative 32-bit.

GOT-relative 64-bit.

PC-rel. GOT off. load imm. 20:2.

STT_GNU_IFUNC relocation.

PC-rel. B imm. from bits 27:2.

Create PLT entry.

GOT-rel. off. LD/ST imm. 14:3.

GOT-page-rel. GOT off. LD/ST 14:3

Dir. GOT off. LD/ST imm. 11:3.

Likewise for LD/ST; no check.

Dir. ADD imm. from bits 11:1.

Likewise for bits 11:2.

Likewise for bits 11:3.

Dir. ADD imm. from bits 11:4.

PC-rel. LD imm. from bits 20:2.

GOT-rel. off. MOV{N,Z} imm. 15:0.

Likewise for MOVK; no check.

GOT-rel. o. MOV{N,Z} imm. 31:16.

Likewise for MOVK; no check.

GOT-rel. o. MOV{N,Z} imm. 47:32.

Likewise for MOVK; no check.

GOT-rel. o. MOV{N,Z} imm. 63:48.

PC-rel. MOV{N,Z} imm. from 15:0.

Likewise for MOVK; no check.

PC-rel. MOV{N,Z} imm. from 31:16.

Likewise for MOVK; no check.

PC-rel. MOV{N,Z} imm. from 47:32.

Likewise for MOVK; no check.

PC-rel. MOV{N,Z} imm. from 63:48.

Dir. MOV{N,Z} imm. from 15:0.

Dir. MOV{N,Z} imm. from 31:16.

Dir. MOV{N,Z} imm. from 47:32.

Dir. MOVZ imm. from bits 15:0.

Likewise for MOVK; no check.

Dir. MOVZ imm. from bits 31:16.

Likewise for MOVK; no check.

Dir. MOVZ imm. from bits 47:32.

Likewise for MOVK; no check.

Dir. MOV{K,Z} imm. from 63:48.

No relocation.

Direct 32 bit.

Copy symbol at runtime.

Create GOT entry.

STT_GNU_IFUNC relocation.

Create PLT entry.

Adjust by program base.

TLS Descriptor.

Module number, 32 bit.

Module-relative offset, 32 bit.

TP-relative offset, 32 bit.

PC-relative 16-bit.

PC-relative 32-bit.

PC-relative 64-bit.

Adjust by program base.

TLS Descriptor.

Direct ADD imm. from 11:0.

Page-rel. ADRP imm. 32:12.

PC-rel. ADR immediate 20:0.

Direct LD off. from 11:3.

PC-rel. load immediate 20:2.

GOT-rel. MOVK imm. 15:0; no ck.

GOT-rel. MOV{N,Z} imm. 31:16.

direct ADD imm. from 11:0.

page-rel. ADRP imm. 32:12.

PC-relative ADR imm. 20:0.

GOT-rel. MOVK imm. 15:0.

GOT-rel. MOV{N,Z} 31:16.

PC-rel. load imm. 20:2.

GOT-rel. MOV{N,Z} 31:16.

DTP-rel. ADD imm. from 23:12.

DTP-rel. ADD imm. from 11:0.

Likewise; no ovfl. check.

Like 514; local dynamic model.

Like 513; local dynamic model.

Like 512; local dynamic model.

DTP-rel. LD/ST imm. 11:0.

DTP-rel. LD/ST imm. 11:1.

DTP-rel. LD/ST imm. 11:2.

DTP-rel. LD/ST imm. 11:3.

DTP-rel. LD/ST imm. 11:4.

TLS PC-rel. load imm. 20:2.

TLS DTP-rel. MOV{N,Z} 15:0.

Likewise; MOVK; no check.

TLS DTP-rel. MOV{N,Z} 31:16.

Likewise; MOVK; no check.

TLS DTP-rel. MOV{N,Z} 47:32.

Like 516; local dynamic model.

Like 515; local dynamic model.

TP-rel. ADD imm. 23:12.

TP-rel. ADD imm. 11:0.

Likewise; no ovfl. check.

TP-rel. LD/ST off. 11:0.

Likewise; no ovfl. check.

TP-rel. LD/ST off. 11:1.

TP-rel. LD/ST off. 11:2.

TP-rel. LD/ST off. 11:3.

TP-rel. LD/ST off. 11:4.

TLS TP-rel. MOV{N,Z} 15:0.

Likewise; MOVK; no check.

TLS TP-rel. MOV{N,Z} 31:16.

Likewise; MOVK; no check.

TLS TP-rel. MOV{N,Z} 47:32.

Module number, 64 bit.

Module-relative offset, 64 bit.

TP-relative offset, 64 bit.

PC-rel. TBZ/TBNZ imm. from 15:2.

PC+4 relative 23 bit shifted

Copy symbol at runtime

Create GOT entry

Add displacement to GP

GP relative 16 bit

GP relative 32 bit

GP relative 32 bit, high 16 bits

GP relative 32 bit, low 16 bits

PC+4 relative 16 bit shifted

Create PLT entry

GP relative 16 bit w/optimization

Optimization hint for LITERAL

No reloc

Direct 32 bit

Direct 64 bit

Adjust by program base

PC relative 16 bit

PC relative 32 bit

PC relative 64 bit

Direct 8 bit

Direct 12 bit

Direct 16 bit

Direct 32 bit

Direct 32-bit.

PC relative (ADD, SUB).

PC relative (ADD, SUB).

PC relative (ADD, SUB).

PC relative (ADD, SUB).

PC relative (ADD, SUB).

Deprecated, prog. base relative.

Deprecated, prog. base relative.

Program base relative (ADD,SUB).

Program base relative (ADD,SUB).

Program base relative (ADD,SUB).

Program base relative (ADD,SUB).

Program base relative (ADD,SUB).

Adjust by program base.

PC relative 24 bit (BL, BLX).

Copy symbol at runtime

Create GOT entry

32 bit GOT entry

32 bit offset to GOT

12 bit, GOT entry relative to GOT origin (LDR, STR).

32 bit PC relative offset to GOT

GOT entry.

GOT entry relative to GOT origin (LDR).

PC relative GOT entry.

PC relative 24 bit (B, BL).

Create PLT entry

PC relative (LDC, STC).

PC relative (LDC, STC).

PC relative (LDC, STC).

Program base relative (LDC,STC).

Program base relative (LDC,STC).

Program base relative (LDC,STC).

PC relative (STR{D,H}, LDR{D,SB,H,SH}).

PC relative (STR{D,H}, LDR{D,SB,H,SH}).

PC relative (STR{D,H}, LDR{D,SB,H,SH}).

Program base relative (LDR, STR, LDRB, STRB).

Program base relative (LDR, STR, LDRB, STRB).

Program base relative (LDR, STR, LDRB, STRB).

PC relative (LDR,STR,LDRB,STRB).

PC relative (LDR,STR,LDRB,STRB).

Deprecated, prog. base relative.

Program base relative (LDR, STR, LDRB, STRB).

Program base relative (LDR, STR, LDRB, STRB).

Program base relative (LDR, STR, LDRB, STRB).

Obsolete.

Direct high 16-bit (MOVT).

Program base relative high 16 bit (MOVT).

PC relative (MOVT).

Direct 16-bit (MOVW).

Program base relative 16 bit (MOVW).

Program base relative 16 bit (MOVW).

PC relative 16-bit (MOVW).

No reloc

Deprecated PC relative 26 bit branch.

Deprecated, 32 bit PLT address.

32 bit PC relative.

PC relative 32 bit

PC relative 32-bit.

Adjust by program base

Program base relative.

Obsolete static relocation.

Direct & 0x7C (LDR, STR).

PC relative 12 bit (Thumb32 ADR.W).

GOT entry relative to GOT origin, 12 bit (Thumb32 LDR).

PC relative X & 0x7E (Thumb16 CBZ, CBNZ).

PC relative 20 bit (Thumb32 B.W).

PC relative 24 bit (Thumb32 B.W).

Direct high 16 bit (Thumb32 MOVT).

Program base relative high 16 bit (Thumb32 MOVT).

PC relative high 16 bit (Thumb32 MOVT).

Direct 16 bit (Thumb32 MOVW).

Program base relative 16 bit (Thumb32 MOVW).

Program base relative 16 bit (Thumb32 MOVW).

PC relative 16 bit (Thumb32 MOVW).

PC relative & 0x3FC (Thumb16 LDR, ADD, ADR).

PC relative & 0x1FE (Thumb16 B/B).

PC relative & 0xFFE (Thumb16 B).

PC relative 12 bit (Thumb32 LDR{D,SB,H,SH}).

PC relative 24 bit (Thumb32 BL).

Reserved.

Reserved.

Dynamic relocation.

TLS relaxation.

ID of module containing symbol

Offset in TLS block

PC-rel 32 bit for global dynamic thread local data

12 bit GOT entry relative to GOT origin (LDR).

PC-rel 32 bit for GOT entry of static TLS block offset

PC-rel 32 bit for local dynamic thread local data

12 bit relative to TLS block (LDR, STR).

32 bit offset relative to TLS block

12 bit relative to static TLS block (LDR, STR).

32 bit offset relative to static TLS block

Offset in static TLS block

Reserved.

Direct 16 bit

Direct 32 bit

No reloc

direct 32 bit (S + A)

GOT entry in GLOB_DAT (GOT + G)

high & low 16 bit ADDRGOT, (GOT + G * 4) & 0xffff

(GOT + G * 4) & 0xffff

PLT entry in GLOB_DAT (GOT + G)

high & low 16 bit ADDRPLT, ((GOT + G * 4) >> 16) & 0xFFFF

(GOT+G*4) & 0xffff

high & low 16 bit ADDR, ((S + A) >> 16) & 0xffff

(S + A) & 0xffff

32 bit adjust by program base

disp (S+A-BDATA) & 0x3ffff

disp ((S+A-BDATA)>>1) & 0x3ffff

disp ((S+A-BDATA)>>2) & 0x3ffff

(S+A-BTEXT) & 0xffff

off between got and sym (S)

12 bit disp GOT entry (G)

32 bit GOT entry (G)

offset to GOT (S + A - GOT)

high & low 16 bit GOTOFF, ((S + A - GOT) >> 16) & 0xffff

(S + A - GOT) & 0xffff

PC offset to GOT (GOT + A - P)

high & low 16 bit GOTPC, ((GOT + A - P) >> 16) & 0xffff

(GOT + A - P) & 0xffff

high & low 16 bit GOT, (G >> 16) & 0xffff

disp (G >> 2)

(G & 0xffff)

PLT entry (S)

no reloc

32-bit rel (S + A - P)

disp ((S + A - P) >> 2) & 0xff

disp ((S + A - P) >> 1) & 0x7ff

disp ((S + A - P) >>1) & 0x7ff

disp ((S+A-P) >>2) & 0x7f

disp ((S + A - P) >> 1) & 0x3ff

disp ((S + A - P) >> 2) & 0x3ff

disp ((S + A - P) >> 1) & 0xffff

disp ((S + A - P) >> 2) & 0xffff

disp ((S+A-P) >>1) & 0x3ffff

((S + A - P) >> 1) & 0x3ff_ffff

disp ((S+A-P) >>1) & x3ff_ffff

12 bit disp PLT entry (G)

32 bit PLT entry (G)

high & low 16 bit PLT, (G >> 16) & 0xffff

disp (G >> 2)

32 bit adjust program base(B + A)

32 bit offset to TLS block

(S+A-BTEXT) & 0xffff

Direct 32 bit

copy relocation

symbol + addend, data4 LSB

symbol + addend, data4 MSB

symbol + addend, data8 LSB

symbol + addend, data8 MSB

@dtpmod(sym + add), data8 LSB

@dtpmod(sym + add), data8 MSB

@dtprel(sym + add), imm14

@dtprel(sym + add), imm22

@dtprel(sym + add), data4 LSB

@dtprel(sym + add), data4 MSB

@dtprel(sym + add), imm64

@dtprel(sym + add), data8 LSB

@dtprel(sym + add), data8 MSB

@fptr(sym + add), data4 LSB

@fptr(sym + add), data4 MSB

@fptr(sym + add), mov imm64

@fptr(sym + add), data8 LSB

@fptr(sym + add), data8 MSB

@gprel(sym + add), add imm22

@gprel(sym + add), data4 LSB

@gprel(sym + add), data4 MSB

@gprel(sym + add), mov imm64

@gprel(sym + add), data8 LSB

@gprel(sym + add), data8 MSB

symbol + addend, add imm14

symbol + addend, add imm22

symbol + addend, mov imm64

dynamic reloc, imported PLT, LSB

dynamic reloc, imported PLT, MSB

Use of LTOFF22X.

@ltoff(sym + add), add imm22

LTOFF22, relaxable.

@ltoff(sym + add), mov imm64

@ltoff(@dtpmod(sym + add)), imm22

@ltoff(@dtprel(s+a)), imm22

@ltoff(@fptr(s+a)), imm22

@ltoff(@fptr(s+a)), data4 LSB

@ltoff(@fptr(s+a)), data4 MSB

@ltoff(@fptr(s+a)), imm64

@ltoff(@fptr(s+a)), data8 LSB

@ltoff(@fptr(s+a)), data8 MSB

@ltoff(@tprel(s+a)), imm2

symbol + addend, data4 LSB

symbol + addend, data4 MSB

symbol + addend, data8 LSB

symbol + addend, data8 MSB

@pcrel(sym + add), ptb, call

@pcrel(sym + add), 21bit inst

@pcrel(sym + add), fchkf

@pcrel(sym + add), chk.s

@pcrel(sym + add), 22bit inst

@pcrel(sym + add), data4 LSB

@pcrel(sym + add), data4 MSB

@pcrel(sym + add), brl

@pcrel(sym + add), 64bit inst

@pcrel(sym + add), data8 LSB

@pcrel(sym + add), data8 MSB

@pltoff(sym + add), add imm22

@pltoff(sym + add), mov imm64

@pltoff(sym + add), data8 LSB

@pltoff(sym + add), data8 MSB

data 4 + REL

data 4 + REL

data 8 + REL

data 8 + REL

@secrel(sym + add), data4 LSB

@secrel(sym + add), data4 MSB

@secrel(sym + add), data8 LSB

@secrel(sym + add), data8 MSB

@segrel(sym + add), data4 LSB

@segrel(sym + add), data4 MSB

@segrel(sym + add), data8 LSB

@segrel(sym + add), data8 MSB

Addend and symbol difference

@tprel(sym + add), imm14

@tprel(sym + add), imm22

@tprel(sym + add), imm64

@tprel(sym + add), data8 LSB

@tprel(sym + add), data8 MSB

PC relative 10 bit shifted.

PC relative 10 bit shifted.

Direct 16 bit.

Direct 16 bit.

PC relative 18 bit shifted.

PC relative 18 bit shifted.

Direct 24 bit.

Direct 24 bit.

PC relative 26 bit shifted.

PC relative 26 bit shifted.

26 bit PC relative to PLT shifted

Direct 32 bit.

Direct 32 bit.

Copy symbol at runtime

Create GOT entry

High 16 bit GOT entry with signed low

High 16 bit GOT entry with unsigned low

Low 16 bit GOT entry

24 bit GOT entry

24 bit offset to GOT

High 16 bit offset to GOT with signed low

High 16 bit offset to GOT with unsigned low

Low 16 bit offset to GOT

24 bit PC relative offset to GOT

High 16 bit PC relative offset to GOT with signed low

High 16 bit PC relative offset to GOT with unsigned low

Low 16 bit PC relative offset to GOT

High 16 bit with signed low.

High 16 bit with signed low

High 16 bit with unsigned low.

High 16 bit with unsigned low

Create PLT entry

Low 16 bit.

Low 16 bit

No reloc.

Keep this the last entry.

PC relative 32 bit.

Adjust by program base

16 bit offset in SDA.

16 bit offset in SDA

32bit absolute address

No reloc

Direct 32 bit.

Low 16 bit.

PC relative 32 bit.

Low 16 bits of PCREL32.

Symbol Op Symbol relocation.

Direct 64 bit.

PC relative 64 bit.

Runtime copy.

Create GOT entry.

GNU C++ vtable member usage.

GNU C++ vtable hierarchy.

32 bit offset to GOT.

64 bit offset to GOT.

PC-relative GOT offset.

GOT entry offset.

Create PLT entry.

PLT offset (PC-relative).

Adjust by program base.

Read-only small data area.

Read-write small data area.

TLS Reloc.

TLS Offset Within TLS Block.

TLS Offset Within TLS Block.

TLS General Dynamic.

TLS Offset From Thread Pointer.

TLS Local Dynamic.

TLS Offset From Thread Pointer.

Direct 16 bit

Direct 26 bit shifted

Direct 32 bit

16 bit GOT entry for function

16 bit GOT entry

GP relative 16 bit

GP relative 32 bit

High 16 bit

16 bit literal entry

Low 16 bit

No reloc

PC relative 16 bit

PC relative 32 bit

Module number 32 bit

Module number 64 bit

Module-relative offset 32 bit

Module-relative offset 64 bit

Module-relative offset, high 16 bits

Module-relative offset, low 16 bits

16 bit GOT offset for GD

16 bit GOT offset for IE

16 bit GOT offset for LDM

TP-relative offset, 32 bit

TP-relative offset, 64 bit

TP-relative offset, high 16 bits

TP-relative offset, low 16 bits

Direct 8 bit.

Direct 16 bit.

Direct 24 bit.

Direct 32 bit.

Alignment requirement for linker relaxation.

Copy symbol at runtime.

Create GOT entry.

… collection annotation.

Ancient C++ vtable garbage…

16-bit offset to GOT entry.

24-bit offset to GOT entry.

32-bit offset to GOT entry.

16-bit offset from GOT.

24-bit offset from GOT.

32-bit offset from GOT.

16-bit PCrel offset to GOT.

32-bit PCrel offset to GOT.

Create PLT entry.

No reloc.

PC-relative 8-bit signed.

PC-relative 16-bit signed.

PC-relative 32-bit.

16-bit PCrel to PLT entry.

32-bit PCrel to PLT entry.

Adjust by program base.

Adjustment for next reloc as needed by linker relaxation.

ID of module containing symbol.

Offset in module TLS block.

32-bit offset for global dynamic.

GOT offset for static TLS block offset.

GOT address for static TLS block offset.

32-bit offset for local dynamic.

Module-relative offset.

Offset relative to static TLS block.

Offset in static TLS block.

Direct 16 bit

Direct 32 bit

Alignment requirement for linker relaxation.

8 bit symbol value + addend.

16 bit symbol value + addend.

32 bit symbol value + addend.

5 bit expression, shift 22.

16 bit GOT entry for function.

Direct call.

Direct call in .noat section.

Indirect call through register.

%hiadj() of function GOT entry.

%lo() of function GOT entry.

Conditional branch.

Copy symbol at runtime.

Create GOT entry.

GNU C++ vtable member usage.

GNU C++ vtable hierarchy.

16 bit GOT entry.

16 bit offset to GOT pointer.

%hiadj of offset to GOT pointer.

%lo of offset to GOT pointer.

%hiadj() of GOT entry.

%lo() of GOT entry.

16 bit GP pointer offset.

High 16 bit.

High 16 bit, adjusted.

5 bit constant expression.

6 bit constant expression.

8 bit constant expression.

Create PLT entry.

Low 16 bit.

No reloc.

PC relative 16 bit.

%hiadj of PC relative offset.

%lo of PC relative offset.

Adjust by program base.

Direct signed 16 bit.

Module number.

Module-relative offset.

16 bit GOT offset for TLS GD.

16 bit GOT offset for TLS IE.

16 bit GOT offset for TLS LDM.

16 bit module relative offset.

16 bit LE TP-relative offset.

TP-relative offset.

Direct unsigned 16 bit.

Unconditional branch.

Copy relocation.

14 bits of eff. address.

Right 14 bits of eff. address.

14 bits of eff. address.

16 bits of eff. address.

16 bits of eff. address.

16 bits of eff. address.

17 bits of eff. address.

Right 17 bits of eff. address.

Left 21 bits of eff. address.

Direct 32-bit reference.

64 bits of eff. address.

Right 14 bits of rel. address.

Left 21 bits of rel. address.

Dynamic reloc, exported PLT

64 bits function address.

GP-rel. address, right 14 bits.

GP-relative, right 14 bits.

GP-rel. address, right 14 bits.

16 bits GP-rel. address.

16 bits GP-rel. address.

16 bits GP-rel. address.

GP-relative, left 21 bits.

64 bits of GP-rel. address.

Dynamic reloc, imported PLT

LT-rel. address, right 14 bits.

LT-relative, right 14 bits.

LT-rel. address, right 14 bits.

16 bits LT-rel. address.

16 bits LT-rel. address.

16 bits LT-rel. address.

LT-relative, left 21 bits.

64 bits LT-rel. address.

LT-rel. fct. ptr., right 14 bits.

LT-rel. fct ptr, right 14 bits.

LT-rel. fct. ptr., right 14 bits.

16 bits LT-rel. function ptr.

16 bits LT-rel. function ptr.

16 bits LT-rel. function ptr.

LT-rel. fct ptr, left 21 bits.

32 bits LT-rel. function pointer.

64 bits LT-rel. function ptr.

LT-TP-rel. address, right 14 bits.

14 bits LT-TP-rel. address.

LT-TP-rel. address, right 14 bits.

LT-TP-rel. address, right 14 bits.

16 bits LT-TP-rel. address.

16 bits LT-TP-rel. address.

16 bits LT-TP-rel. address.

LT-TP-rel. address, left 21 bits.

64 bits LT-TP-rel. address.

No reloc.

PC rel. address, right 14 bits.

Right 14 bits of rel. address.

PC-rel. address, right 14 bits.

16 bits PC-rel. address.

16 bits PC-rel. address.

16 bits PC-rel. address.

17 bits of rel. address.

Right 17 bits of rel. address.

Left 21 bits of rel. address.

22 bits PC-rel. address.

32-bit rel. address.

64 bits PC-rel. address.

Right 14 bits of fdesc address.

Left 21 bits of fdesc address.

32 bits function address.

PLT-rel. address, right 14 bits.

PLT rel. address, right 14 bits.

PLT-rel. address, right 14 bits.

16 bits PLT-rel. address.

16 bits LT-rel. address.

16 bits PLT-rel. address.

PLT rel. address, left 21 bits.

32 bits section rel. address.

64 bits section rel. address.

No relocation, set segment base.

32 bits segment rel. address.

64 bits segment rel. address.

DTP module 32-bit.

DTP module 64-bit.

DTP offset 32-bit.

DTP offset 32-bit.

GD 14-bit right.

GD 21-bit left.

GD call to __t_g_a.

LD module 14-bit right.

LD module 21-bit left.

LD module call to __t_g_a.

LD offset 14-bit right.

LD offset 21-bit left.

TP-rel. address, right 14 bits.

TP-rel. address, right 14 bits.

TP-rel. address, right 14 bits.

16 bits TP-rel. address.

16 bits TP-rel. address.

16 bits TP-rel. address.

TP-rel. address, left 21 bits.

32 bits TP-rel. address.

64 bits TP-rel. address.

16bit address, word aligned

16bit absolute address

half16ds* (S + A) >> 2

adjusted high 16bits.

high 16bits of address.

half16 #higher(S + A)

half16 #highera(S + A)

half16 #highest(S + A)

half16 #highesta(S + A)

lower 16bits of address

half16ds #lo(S + A) >> 2

26bit address, word aligned

word30 (S + A - P) >> 2

32bit absolute address

doubleword64 S + A

doubleword64 (sym+add)@dtpmod

half16* (sym+add)@dtprel

half16ds* (sym+add)@dtprel

half16 (sym+add)@dtprel@ha

half16 (sym+add)@dtprel@h

half16 (sym+add)@dtprel@higher

half16 (sym+add)@dtprel@highera

half16 (sym+add)@dtprel@highest

half16 (sym+add)@dtprel@highesta

half16 (sym+add)@dtprel@l

half16ds (sym+add)@dtprel@l

doubleword64 (sym+add)@dtprel

half16ds* (G + A) >> 2

half16ds #lo(G + A) >> 2

half16ds* (sym+add)@got@dtprel

half16 (sym+add)@got@dtprel@ha

half16 (sym+add)@got@dtprel@h

half16ds (sym+add)@got@dtprel@l

half16* (sym+add)@got@tlsgd

half16 (sym+add)@got@tlsgd@ha

half16 (sym+add)@got@tlsgd@h

half16 (sym+add)@got@tlsgd@l

half16* (sym+add)@got@tlsld

half16 (sym+add)@got@tlsld@ha

half16 (sym+add)@got@tlsld@h

half16 (sym+add)@got@tlsld@l

half16ds* (sym+add)@got@tprel

half16 (sym+add)@got@tprel@ha

half16 (sym+add)@got@tprel@h

half16ds (sym+add)@got@tprel@l

GNU extension to support local ifunc.

GNU extension to support local ifunc.

half16ds #lo(L + A) >> 2

doubleword64 L + A

half16* M + A

half16ds* (M + A) >> 2

half16 #ha(M + A)

half16 #hi(M + A)

half16 #lo(M + A)

half16ds #lo(M + A) >> 2

doubleword64 L + A - P

PC relative 16 bit

half16 (sym+add-.)

half16 (sym+add-.)@ha

half16 (sym+add-.)@h

half16 (sym+add-.)@l

PC-rel. 26 bit, word aligned

doubleword64 S + A - P

half16ds* (R + A) >> 2

half16ds #lo(R + A) >> 2

none (sym+add)@tls

none (sym+add)@tlsgd

none (sym+add)@tlsld

doubleword64 .TOC

half16* S + A - .TOC

half16ds* (S + A - .TOC.) >> 2

half16 #ha(S + A - .TOC.)

half16 #hi(S + A - .TOC.)

half16 #lo(S + A - .TOC.)

half16ds #lo(S + A - .TOC.) >> 2

half16* (sym+add)@tprel

half16ds* (sym+add)@tprel

half16 (sym+add)@tprel@ha

half16 (sym+add)@tprel@h

half16 (sym+add)@tprel@higher

half16 (sym+add)@tprel@highera

half16 (sym+add)@tprel@highest

half16 (sym+add)@tprel@highesta

half16 (sym+add)@tprel@l

half16ds (sym+add)@tprel@l

doubleword64 (sym+add)@tprel

doubleword64 S + A

16bit address, 2 bits ignored

16bit absolute address

adjusted high 16bit

high 16bit of absolute address

lower 16bit of absolute address

26bit address, 2 bits ignored.

32bit absolute address

like EMB_RELSDA, adjusted high 16

like EMB_RELSDA, but high 16 bit

like EMB_RELSDA, but lower 16 bit

like EMB_SDA21, adjusted high 16

like EMB_SDA21, but high 16 bit

like EMB_SDA21, but lower 16 bit

word32 (sym+add)@dtpmod

half16*(sym+add)@dtprel

half16 (sym+add)@dtprel@ha

half16 (sym+add)@dtprel@h

half16 (sym+add)@dtprel@l

word32 (sym+add)@dtprel

16 bit relative offset in SDA

16 bit offset in SDA

half16* (sym+add)@got@dtprel

half16* (sym+add)@got@dtprel@ha

half16* (sym+add)@got@dtprel@h

half16* (sym+add)@got@dtprel@l

half16* (sym+add)@got@tlsgd

half16 (sym+add)@got@tlsgd@ha

half16 (sym+add)@got@tlsgd@h

half16 (sym+add)@got@tlsgd@l

half16* (sym+add)@got@tlsld

half16 (sym+add)@got@tlsld@ha

half16 (sym+add)@got@tlsld@h

half16 (sym+add)@got@tlsld@l

half16* (sym+add)@got@tprel

half16 (sym+add)@got@tprel@ha

half16 (sym+add)@got@tprel@h

half16 (sym+add)@got@tprel@l

GNU extension to support local ifunc.

PC relative 16 bit

half16 (sym+add-.)

half16 (sym+add-.)@ha

half16 (sym+add-.)@h

half16 (sym+add-.)@l

PC relative 26 bit

none (sym+add)@tls

none (sym+add)@tlsgd

none (sym+add)@tlsld

This is a phony reloc to handle any old fashioned TOC16 references that may still be in object files.

half16* (sym+add)@tprel

half16 (sym+add)@tprel@ha

half16 (sym+add)@tprel@h

half16 (sym+add)@tprel@l

word32 (sym+add)@tprel

Direct 5 bit

Direct 6 bit

Direct 7 bit

Direct 8 bit

Direct 10 bit

Direct 11 bit

Direct 13 bit

Direct 16 bit

Direct 22 bit

Direct 32 bit

Direct 64 bit

Copy symbol at runtime

PC relative 8 bit

PC relative 16 bit

PC relative 32 bit

PC relative 64 bit

Create GOT entry

was part of v9 ABI but was removed

Truncated 10 bit GOT entry

13 bit GOT entry

22 bit GOT entry shifted

Direct high 12 of 44 bit

Top 22 bits of direct 64 bit

High 22 bit

High 22 bit PLT entry

High 22 bit complemented

High middle 10 bits of …

Create PLT entry

Direct low 10 of 44 bit

Low middle 22 bits of …

Truncated 10 bit

Truncated 10 bit PLT entry

Truncated 11 bit complemented

Direct mid 22 of 44 bit

No reloc

10bit with secondary 13bit addend

PC relative 10 bit truncated

PC relative 22 bit shifted

PC rel trunc 10 bit PLT entry

PC rel high 22 bit PLT entry

PC rel 32 bit ref to PLT entry

Top 22 bits of pc rel 64 bit

High middle 10 bit of …

Low miggle 22 bits of …

Direct 32 bit ref to PLT entry

Direct 64 bit ref to PLT entry

Global register usage

Adjust by program base

Direct 16 bit unaligned

Direct 32 bit unaligned

Direct 64 bit unaligned

PC relative 16 bit shifted

PC relative 19 bit shifted

PC relative 22 bit shifted

PC relative 30 bit shifted

30 bit PC relative PLT address

Direct 8 bit

PC relative 8 bit

Direct 16 bit

PC relative 16 bit

Direct 32 bit

PC relative 32 bit

Direct 64 bit

PC relative 64 bit

X1 pipe branch offset

Copy relocation

X1 pipe destination 8-bit

Create GOT entry

GNU C++ vtable member usage

GNU C++ vtable hierarchy

hword 0 16-bit

last hword 0 16-bit

hword 1 16-bit

last hword 1 16-bit

hword 2 16-bit

last hword 2 16-bit

hword 3 16-bit

X0 pipe 8-bit

X0 pipe “addi” for TLS GD/IE

X0 pipe “addi” for TLS GD

X1 pipe 8-bit

X1 pipe “addi” for TLS GD/IE

X1 pipe “addi” for TLS GD

Y0 pipe 8-bit

Y0 pipe “addi” for TLS GD/IE

Y0 pipe “addi” for TLS GD

Y1 pipe 8-bit

Y1 pipe “addi” for TLS GD/IE

Y1 pipe “addi” for TLS GD

X0 pipe hword 0

X0 pipe hword 0 GOT offset

X0 pipe last hword 0

X0 pipe last hword 0 GOT offset

X0 pipe PC-rel last hword 0

X0 pipe PC-rel PLT last hword 0

X0 pipe last hword 0 GD off

X0 pipe last hword 0 IE off

X0 pipe last hword 0 LE off

X0 pipe PC relative hword 0

X0 pipe PC-rel PLT hword 0

X0 pipe hword 0 TLS GD offset

X0 pipe hword 0 TLS IE offset

X0 pipe hword 0 TLS LE offset

X0 pipe hword 1

X0 pipe last hword 1

X0 pipe last hword 1 GOT offset

X0 pipe PC-rel last hword 1

X0 pipe PC-rel PLT last hword 1

X0 pipe last hword 1 GD off

X0 pipe last hword 1 IE off

X0 pipe last hword 1 LE off

X0 pipe PC relative hword 1

X0 pipe PC-rel PLT hword 1

X0 pipe hword 2

X0 pipe last hword 2

X0 pipe PC-rel last hword 2

X0 pipe PC-rel PLT last hword 2

X0 pipe PC relative hword 2

X0 pipe PC-rel PLT hword 2

X0 pipe hword 3

X0 pipe PC relative hword 3

X0 pipe PC-rel PLT hword 3

X1 pipe hword 0

X1 pipe hword 0 GOT offset

X1 pipe last hword 0

X1 pipe last hword 0 GOT offset

X1 pipe PC-rel last hword 0

X1 pipe PC-rel PLT last hword 0

X1 pipe last hword 0 GD off

X1 pipe last hword 0 IE off

X1 pipe last hword 0 LE off

X1 pipe PC relative hword 0

X1 pipe PC-rel PLT hword 0

X1 pipe hword 0 TLS GD offset

X1 pipe hword 0 TLS IE offset

X1 pipe hword 0 TLS LE offset

X1 pipe hword 1

X1 pipe last hword 1

X1 pipe last hword 1 GOT offset

X1 pipe PC-rel last hword 1

X1 pipe PC-rel PLT last hword 1

X1 pipe last hword 1 GD off

X1 pipe last hword 1 IE off

X1 pipe last hword 1 LE off

X1 pipe PC relative hword 1

X1 pipe PC-rel PLT hword 1

X1 pipe hword 2

X1 pipe last hword 2

X1 pipe PC-rel last hword 2

X1 pipe PC-rel PLT last hword 2

X1 pipe PC relative hword 2

X1 pipe PC-rel PLT hword 2

X1 pipe hword 3

X1 pipe PC relative hword 3

X1 pipe PC-rel PLT hword 3

Create PLT entry

X1 pipe jump offset

X1 pipe jump offset to PLT

X1 pipe mfspr

X0 pipe mm “end”

X0 pipe mm “start”

X1 pipe mtspr

No reloc

Adjust by program base

X0 pipe shift amount

X1 pipe shift amount

Y0 pipe shift amount

Y1 pipe shift amount

32-bit ID of symbol’s module

64-bit ID of symbol’s module

32-bit offset in TLS block

64-bit offset in TLS block

“jal” for TLS GD

“ld_tls” for TLS IE

32-bit offset in static TLS block

64-bit offset in static TLS block

Direct 8 bit

PC relative 8 bit

Direct 16 bit

PC relative 16 bit

Direct 32 bit

PC relative 32 bit

X1 pipe branch offset

Copy relocation

X1 pipe destination 8-bit

Create GOT entry

GNU C++ vtable member usage

GNU C++ vtable hierarchy

High 16 bit, adjusted

High 16 bit

X0 pipe 8-bit

X0 pipe “addi” for TLS GD

X1 pipe 8-bit

X1 pipe “addi” for TLS GD

Y0 pipe 8-bit

Y0 pipe “addi” for TLS GD

Y1 pipe 8-bit

Y1 pipe “addi” for TLS GD

X0 pipe 16-bit

X0 pipe 16-bit GOT offset

X0 pipe ha() 16-bit GOT offset

X0 pipe high 16-bit GOT offset

X0 pipe low 16-bit GOT offset

X0 pipe high 16-bit, adjusted

X0 pipe PC relative ha() 16 bit

X0 pipe high 16-bit

X0 pipe PC relative high 16 bit

X0 pipe low 16-bit

X0 pipe PC relative low 16 bit

X0 pipe PC relative 16 bit

X0 pipe 16-bit TLS GD offset

X0 pipe ha() 16-bit TLS GD offset

X0 pipe high 16-bit TLS GD offset

X0 pipe low 16-bit TLS GD offset

X0 pipe 16-bit TLS IE offset

X0 pipe ha() 16-bit TLS IE offset

X0 pipe high 16-bit TLS IE offset

X0 pipe low 16-bit TLS IE offset

X0 pipe 16-bit TLS LE offset

X0 pipe ha() 16-bit TLS LE offset

X0 pipe high 16-bit TLS LE offset

X0 pipe low 16-bit TLS LE offset

X1 pipe 16-bit

X1 pipe 16-bit GOT offset

X1 pipe ha() 16-bit GOT offset

X1 pipe high 16-bit GOT offset

X1 pipe low 16-bit GOT offset

X1 pipe high 16-bit, adjusted

X1 pipe PC relative ha() 16 bit

X1 pipe high 16-bit

X1 pipe PC relative high 16 bit

X1 pipe low 16-bit

X1 pipe PC relative low 16 bit

X1 pipe PC relative 16 bit

X1 pipe 16-bit TLS GD offset

X1 pipe ha() 16-bit TLS GD offset

X1 pipe high 16-bit TLS GD offset

X1 pipe low 16-bit TLS GD offset

X1 pipe 16-bit TLS IE offset

X1 pipe ha() 16-bit TLS IE offset

X1 pipe high 16-bit TLS IE offset

X1 pipe low 16-bit TLS IE offset

X1 pipe 16-bit TLS LE offset

X1 pipe ha() 16-bit TLS LE offset

X1 pipe high 16-bit TLS LE offset

X1 pipe low 16-bit TLS LE offset

Create PLT entry

X1 pipe jump offset

X1 pipe jump offset to PLT

Low 16 bit

X1 pipe mfspr

X0 pipe mm “end”

X1 pipe mm “end”

X0 pipe mm “start”

X1 pipe mm “start”

X1 pipe mtspr

Adjust by program base

X0 pipe shift amount

X1 pipe shift amount

Y0 pipe shift amount

Y1 pipe shift amount

ID of module containing symbol

Offset in TLS block

“jal” for TLS GD

“lw_tls” for TLS IE

Offset in static TLS block

Direct 8 bit sign extended

Direct 16 bit zero extended

Direct 32 bit zero extended

Direct 32 bit sign extended

Direct 64 bit

Copy symbol at runtime

ID of module containing symbol

Offset in TLS block

Offset in module’s TLS block

Create GOT entry

32 bit GOT entry

64-bit GOT entry offset

64 bit offset to GOT

32 bit signed pc relative offset to GOT

GOT offset for TLS descriptor.

64-bit PC relative offset to GOT

32 bit signed PC relative offset to GOT

64-bit PC relative offset to GOT entry

Load from 32 bit signed pc relative offset to GOT entry without REX prefix, relaxable.

like GOT64, says PLT entry needed

32 bit signed PC relative offset to GOT entry for IE symbol

Adjust indirectly by program base

Create PLT entry

No reloc

8 bit sign extended pc relative

16 bit sign extended pc relative

PC relative 32 bit signed

PC relative 64 bit

32 bit PLT address

64-bit GOT relative offset to PLT entry

Adjust by program base

64-bit adjust by program base

Load from 32 bit signed pc relative offset to GOT entry with REX prefix, relaxable.

Size of symbol plus 32-bit addend

Size of symbol plus 64-bit addend

TLS descriptor.

Marker for call through TLS descriptor.

32 bit signed PC relative offset to two GOT entries for GD symbol

32 bit signed PC relative offset to two GOT entries for LD symbol

Offset in initial TLS block

Offset in initial TLS block

Section occupies memory during execution.

Section may be multiply defined in the input to a link step.

Section contains an entry point

Section is compressed.

Section is executable.

Section is a member of a group.

spec insns w/o recovery

section near gp

The sh_info field contains a section header table index.

Section has special ordering requirements when combining sections.

OS-specific section flags.

Processor-specific section flags.

Section may be be merged to eliminate duplication.

Must be in global data area.

Section requires special OS-specific handling.

Section far from gp.

Static branch prediction code.

Section with short addressing.

Section contains nul-terminated strings.

Section holds thread-local storage.

Section is writable.

Associated symbol is absolute.

Associated symbol is common.

End of OS-specific section indices.

End of processor-specific section indices.

End of reserved section indices.

Start of OS-specific section indices.

Start of processor-specific section indices.

OS-specific range start. Start of reserved section indices.

Allocated common symbols.

Allocated data symbols.

Small common symbols.

Small undefined symbols.

Allocated test symbols.

Section for tenatively declared symbols in ANSI C.

Common blocks in huge model.

Undefined section.

Section index is in the SHT_SYMTAB_SHNDX section.

ARM attributes section.

ARM unwind section.

Preemption details.

C-SKY attributes section.

Dynamic linking information.

Dynamic linker symbol table.

Array of destructors.

Section group.

Symbol hash table.

End of OS-specific section types.

End of processor-specific section types.

End of application-specific section types.

extension bits

unwind bits

Array of constructors.

Start of OS-specific section types.

Start of processor-specific section types.

Start of application-specific section types.

Conflicting symbols.

MIPS ECOFF debugging info.

DWARF debugging information.

Event section.

Global data area sizes.

Shared objects used in link.

Miscellaneous options.

Register usage information.

Reserved for SGI/MIPS compilers

Program space with no data (bss).

Notes.

Section header table entry is unused.

Debug info for optimized code.

Contains product specific ext.

Unwind information.

Array of pre-constructors.

Program data.

Relocation entries without explicit addends.

Relocation entries with explicit addends.

Reserved section type.

String table.

Symbol table.

Extended section indices for a symbol table.

Unwind information.

Global symbol.

Unique symbol.

End of OS-specific symbol binding.

End of processor-specific symbol binding.

Local symbol.

Start of OS-specific symbol binding.

Start of processor-specific symbol binding.

Weak symbol.

No PV required.

PV only used for initial ldgp.

Only valid for STB_MIPS_SPLIT_COMMON.

A Thumb label.

A Thumb function.

Symbol is a common data object.

Symbol’s name is a file name.

Symbol is a code object.

Symbol is an indirect code object.

End of OS-specific symbol types.

End of processor-specific symbol types.

Start of OS-specific symbol types.

Start of processor-specific symbol types.

Symbol type is unspecified.

Symbol is a data object.

Millicode function entry point.

Symbol is associated with a section.

Global register reserved to app.

Symbol is a thread-local storage object.

Default symbol visibility rules.

Symbol is not visible to other components.

Processor specific hidden class.

Symbol is visible to other components, but is not preemptible.

Beginning of reserved entries

Symbol bound to parent

Symbol bound to self

Symbol is a copy-reloc

Direct bound symbol

Symbol bound to object to be lazy loaded

Pass-thru symbol for translator

Statics

Note name for core files.

GNU entries in the note section have this name.

Note name for linux core files.

Solaris entries in the note section have this name.